Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!iuvax!rutgers!columbia!cs!jordan
From: jordan@cs.columbia.edu (Jordan Hayes)
Newsgroups: comp.lang.c++
Subject: Re: filename extensions
Message-ID: <199@cs.columbia.edu>
Date: 8 May 89 22:30:01 GMT
References: <JEFFB.89May8141340@grace.cs.washington.edu>
Reply-To: jordan@cs.columbia.edu (Jordan Hayes)
Followup-To: comp.lang.c++
Organization: Citibank, NA NYC, NY (212) 735-7539
Lines: 54

Jeff Bowden <jeffb@grace.cs.washington.edu> writes:

	Personally I just use the ".c" extension and let my Makefile
	take care of the details (can you say "CC=g++"?)

Can you say `works only in the trivial case' ...?

What if you have C && C++ source in the same Makefile?

Thank god for GNU Make or "make depend" would be a headache ...

/jordan

ps: here's mine ...

-----
GCC		= gcc
CC		= ${GCC}
C++		= g++
C++SRCS		=$(wildcard *.cc)
C++DEP		=${C++} ${CPPFLAGS} -MM
CSRCS		=$(wildcard *.c)
CDEP		=${CC} ${CPPFLAGS} -MM

cdep:
	  for i in ${CSRCS} ;\
	    do \
	      ${CDEP} $$i >> DEPEND ;\
	    done

c++dep:
	  for i in ${C++SRCS} ;\
	    do \
	      ${C++DEP} $$i >> DEPEND ;\
	    done

ifneq "${CSRCS}" ""
DEP	= cdep
else
DEP	=
endif

ifneq "${C++SRCS}" ""
ADEP	= ${DEP} c++dep
else
ADEP	= ${DEP}
endif

depend:
	echo > DEPEND
	make ${ADEP}

include DEPEND
-----