Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!ncar!ames!pasteur!ucbvax!POSTGRES.BERKELEY.EDU!dillon
From: dillon@POSTGRES.BERKELEY.EDU (Matt Dillon)
Newsgroups: comp.sys.amiga.tech
Subject: Re: Re: Need advice on hardware projects
Message-ID: <8905012101.AA25658@postgres.Berkeley.EDU>
Date: 1 May 89 21:01:53 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Lines: 10


	Refresh has always seemed so silly to me... nobody does the smart
thing, which is to *monitor* the address bus and only supply refresh for
the rows not accessed by the computer.  So, the more loaded your computer
gets the fewer refresh cycles need to come in and steal time.

	That isn't too difficult a function to add in a VLSI refresh 
controller.

					-Matt