Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!sharkey!aucis!easton
From: easton@aucis.UUCP (Jeff Easton)
Newsgroups: comp.sys.m6809
Subject: Re: fast clock for 6809
Message-ID: <411@aucis.UUCP>
Date: 7 May 89 12:49:29 GMT
References: <1605@ccnysci.UUCP> <1984@wpi.wpi.edu> <410@aucis.UUCP> <2171@wpi.wpi.edu>
Organization: Andrews University, Berrien Springs, MI
Lines: 28

In article <2171@wpi.wpi.edu>, jhallen@wpi.wpi.edu (Joseph H Allen) writes:
> In article <410@aucis.UUCP> easton@aucis.UUCP (Jeff Easton) writes:
> 
> 6809 have a minimum clock speed because they use DRAMs for the registers.  How
> many seconds can you hold up the clock....  (actually there are even some
> applications for this: if you want the CPU to be synchronized to a video
> system and you do it by stopping the clock during verticle or horz blanking,
> or if you only want to processor to run only during the blanking...)
> 
> Ps:  6809 and OS9 should have become the standard PC, not the IBM PC (we were
> robbed...)

  Obviously the best way to set up a 6809 video system is to interleave the
6809 with the CRTC thereby enabling the 6809 to run all the time.
  If thats not possible, the next best way to stop the CPU is with the
/HALT line.  This will tristate the CPU busses and wait indefinitely
without loss of data.  The crystal clock is still running thereby maintaning
the dynamic registers contents.
  Note that the Hitachi 6309 is not a "static" CMOS design.  It suffers from
the same problem as the NMOS version.  When Intel commisioned the CMOS version
of the 80286 they specified it as a static part so that laptop makers could
turn off the clocks during nonuse, thereby reducing battery power further.
I dont believe any of the major laptop makers used this feature tho...

	Jeff Easton
	Zenith Data Systems

UUCP: !mailrus!sharkey!aucis!easton