Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!rutgers!apple!versatc!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Register usage [was Re: 80486 vs. 68040 code size] Message-ID: <19410@winchester.mips.COM> Date: 11 May 89 03:58:05 GMT References: <926@aber-cs.UUCP> <25254@ames.arc.nasa.gov> Reply-To: mash@mips.COM (John Mashey) Distribution: eunet,world Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 14 In article <25254@ames.arc.nasa.gov> lamaster@ames.arc.nasa.gov (Hugh LaMaster) writes: >still apply. It might be the case that 64 32-bit registers are a better fit >for the suggested Fortran examples. I don't have it handy, but a good example looking at the use of 64 regs is: David W. Wall, Global register Allocation at Link Time, SIGPLAN NOTICES 21(7)264-275, July 1986. -- -john mashey DISCLAIMER: UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086