Path: utzoo!attcan!uunet!cs.utexas.edu!sun-barr!apple!versatc!mips!mark
From: mark@mips.COM (Mark G. Johnson)
Newsgroups: comp.arch
Subject: Scoreboarding HW is simple
Message-ID: <19433@obiwan.mips.COM>
Date: 11 May 89 15:03:55 GMT
Reply-To: mark@mips.COM (Mark G. Johnson)
Lines: 13

If you decide to include register scoreboarding, the cost *in hardware*
is extremely small --- basically negligible.  {at least in MOS and
perhaps E/D-GaAs.}   For a worked example, have a look at

	Glenn Hinton et al, "A Register Scoreboarding Mechanism",
	IEEE ISSCC digest, Feb 1988, pp. 270-1.

(The mechanism described is that implemented in Intel's embedded-
controller RISC cpu, the 960.  Note the nine.)
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
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