Path: utzoo!attcan!uunet!dg!mpogue
From: mpogue@dg.dg.com (Mike Pogue)
Newsgroups: comp.arch
Subject: Re: Register Scoreboarding
Message-ID: <170@dg.dg.com>
Date: 12 May 89 14:36:14 GMT
References: <24821@lll-winken.LLNL.GOV> <GRUNWALD.89May9113443@flute.cs.uiuc.edu> <3288@orca.WV.TEK.COM> <19463@winchester.mips.COM>
Reply-To: mpogue@dg.UUCP (Mike Pogue)
Organization: Data General, Westboro, MA.
Lines: 15

In article <19463@winchester.mips.COM> mash@mips.COM (John Mashey) writes:
>
>Bottom line: the part of scoreboarding that lets you continue beyond a
>	load-cache-miss gets you 1-2%, in an R3000-like architecture,

  John, 
	I think you have missed the point here.  The performance improvement
due to register scoreboarding is only of minor interest.  The real point
from an architectural point of view is that all binaries continue to run
in a predictable way, even when implementation details change.

Mike Pogue
Data General Corp.

These are my opinions, of course....