Path: utzoo!utgpu!utstat!jarvis.csri.toronto.edu!mailrus!csd4.milw.wisc.edu!lll-winken!uunet!mcvax!ukc!icdoc!inmos!wraxall!roger From: roger@wraxall.inmos.co.uk (Roger Shepherd) Newsgroups: comp.arch Subject: Re: Semaphores Message-ID: <1460@brwa.inmos.co.uk> Date: 12 May 89 15:56:11 GMT References: <759@acorn.co.uk> <28200309@mcdurb> Sender: news@inmos.co.uk Reply-To: roger@inmos.co.uk (Roger Shepherd) Organization: INMOS Limited, Bristol, UK. Lines: 15 In article <28200309@mcdurb> aglew@mcdurb.Urbana.Gould.COM writes: >>aglew@mcdurb.Urbana.Gould.COM writes: >>> Apparently the ARM does something similar, only checking for interrupts >>> at branches. >>Steve Furber sfurber@acorn.uucp >Sorry, I confused the Transputer with the Acorn. This isn't true for the Transputer either. The transputer checks for interrupts at the end of every instruction (and during some too). However, the transputer only TIMESLICES low priority processes on unconditional jumps and ``loop end'' instructions. Roger Shepherd, INMOS Ltd JANET: roger@uk.co.inmos 1000 Aztec West UUCP: ukc!inmos!roger or uunet!inmos-c!roger Almondsbury INTERNET: @col.hp.com:roger@inmos-c +44 454 616616 ROW: roger@inmos.co.uk