Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!pasteur!ames!ames.arc.nasa.gov!lamaster From: lamaster@ames.arc.nasa.gov (Hugh LaMaster) Newsgroups: comp.arch Subject: Re: Register usage Message-ID: <25382@ames.arc.nasa.gov> Date: 15 May 89 19:34:01 GMT References: <259@mindlink.UUCP> Sender: usenet@ames.arc.nasa.gov Organization: NASA - Ames Research Center Lines: 60 In article <259@mindlink.UUCP> a464@mindlink.UUCP (Bruce Dawson) writes: >say). In the extreme case of the computer someone mentioned that had 256 I was the person who mentioned 256 registers. The machine is the Cyber 205. >registers, a register-register operation would use up sixteen bits just to >specify the two registers involved. Contrast that with the six bits required >if you only have eight registers. The register to register instructions on the 205 were 32 bits long, the same length as most of today's current crop of machines. 1 Byte went to an 8 bit opcode, and three bytes went to specify the two input and one output register of each instruction. >to deal with, an extra ten bits so that you can have 256 instead of eight >registers is probably too big a price to pay and would probably slow programs >down. I agree that 256 registers were probably too many, because the compiler had trouble using more than about 60 typically. A 64 register machine would have been adequate, given what compilers can generally make use of. I note that these were 64-bit registers. I am not sure what you mean by "slow programs down". Certainly, RISC machines have bigger code than compact code CISC's like VAX and NS32000. But the RISC machines have generally been significantly faster when implemented in the same techology than the corresponding CISC machines. By your reasoning, the Intel iAPX 432 should have been the fastest machine around, since it used bit-variable-length instructions which could begin on any bit. > Speaking from my experience on the 68000, I would say that for assembly >language programming, 16 registers is generally enough, with more being >occasionally desirable. This statement has been repeated in various ways by several people the last few weeks. The problem with this is that the compilers referred to, and the assembly code and coders referred to, ASSUME that registers are for expression evaluation only. We have seen evidence that C expression evaluation does not require more than 16 registers, but that DOES NOT imply that substantial improvements in code speed cannot be made by making "global" (beyond one statement) register assignments. This is not even new. Commercial products have been doing it for at least 15 years. > Because C can't do a very good job of comprehending an >entire substantial subroutine or program and deciding what should be in >registers (actually, replace 'C' with HLL) I would think that a compiler could >actually get by with slightly less. The postings on register usage by the AMD 29000 C compiler were representative of what I have read about most modern C compilers. Clearly, compilers today can make use of 20-30 registers to advantage in C. When dealing with double precision, Fortran, etc. I suspect a case could (it needs investigation) for 64 32-bit registers. Hugh LaMaster, m/s 233-9, UUCP ames!lamaster NASA Ames Research Center ARPA lamaster@ames.arc.nasa.gov Moffett Field, CA 94035 Phone: (415)694-6117