Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!amdcad!rpw3 From: rpw3@amdcad.AMD.COM (Rob Warnock) Newsgroups: comp.arch Subject: Re: Register usage Message-ID: <25664@amdcad.AMD.COM> Date: 17 May 89 18:18:07 GMT References: <952@aber-cs.UUCP> Reply-To: rpw3@amdcad.UUCP (Rob Warnock) Distribution: eunet,world Organization: [Consultant] San Mateo, CA Lines: 30 In article <952@aber-cs.UUCP> pcg@cs.aber.ac.uk (Piercarlo Grandi) writes: +--------------- | In article <8905110956.AA12655@decwrl.dec.com> neideck@nestvx.dec.com writes: | > There is another very interesting paper by David comparing register window | > schemes of varying organization with this global allocation stuff and this | > seems to suggest that a slightly bigger global register file beats register | > windows | The 29k guys will cheer... +--------------- Not really. Again, to clear up the slight misunderstanding, by current 29k software convention [with hardware support from the "gr1+local" address adder], the Am29000 *is* a (variable-sized) register window machine. The "local" regs are allocated with a strict stack discipline, which, as Neideck implies, may not be quite as good as a super-global register allocation strategy. However, with much less than 1% of cycles being spent on register cache spilling/filling (all benchmarks except "Ackerman"), it's probably good enough. [And of course since the current register discipline *is* a software convention, nothing prohibits a future compiler from switching to a super-global allocation strategy...] Rob Warnock Systems Architecture Consultant UUCP: {amdcad,fortune,sun}!redwood!rpw3 DDD: (415)572-2607 USPS: 627 26th Ave, San Mateo, CA 94403