Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!iuvax!uxc!garcon!garcon.cso.uiuc.edu!grunwald From: grunwald@flute.cs.uiuc.edu (Dirk Grunwald) Newsgroups: comp.arch Subject: Re: microprocessor 2nd-level cache protocols for multiprocessin Message-ID: Date: 17 May 89 17:16:36 GMT References: <5481@hubcap.clemson.edu> <18451@cup.portal.com> Sender: news@garcon.cso.uiuc.edu Distribution: comp Organization: University of Illinois, Urbana-Champaign Lines: 6 In-reply-to: mslater@cup.portal.com's message of 17 May 89 03:14:20 GMT What's the MOESI protocol for cache consistency? -- Dirk Grunwald Univ. of Illinois grunwald@flute.cs.uiuc.edu