Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!uunet!dg!mpogue
From: mpogue@dg.dg.com (Mike Pogue)
Newsgroups: comp.arch
Subject: Re: Questions on SparcStation 1 performance
Message-ID: <175@dg.dg.com>
Date: 17 May 89 18:38:35 GMT
References: <6008@brunix.UUCP> <13024@haddock.ima.isc.com> <172@dg.dg.com> <2727@scolex.sco.COM>
Reply-To: uunet!dg!mpogue (Mike Pogue)
Organization: Data General, Westboro, MA.
Lines: 26

In article <2727@scolex.sco.COM> seanf@scolex.UUCP (Sean Fagan) writes:
>
>Well, actually, the 88000 (and the i860, and the Cray's) don't have divide.
>They have reciporcate (actually, I belive they call it reciporocal
>approximation, and, at least on the i860, you have to go through a couple of
>iterations to get the "perfect" result).
>

   Quote from the MC88100 Risc Microprocessor User's Manual:

	page 3-48, description of the FDIV instruction.

	Description:  The contents of the rS1 and rS2 registers [any g.p. source
		register] are checked for reserved operands.  If no reserved operands
	 	are found, the rS1 operand is divided by the rS2 operand according
		to the IEEE 754.  The result is placed in the rD register.  Any
		combination of single- and double-precision operands can be specified.

  Obviously, the 88K DOES do divide.  There are also instructions for signed and unsigned
integer divide.

Mike Pogue
Data General Corp.

My opinions are my own....