Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!ucbvax!decwrl!sun-barr!apple!amdcad!crackle!tim From: tim@crackle.amd.com (Tim Olson) Newsgroups: comp.arch Subject: Re: Register usage [was Re: 80486 vs. 68040 code size] Message-ID: <25689@amdcad.AMD.COM> Date: 19 May 89 16:55:11 GMT References: <959@aber-cs.UUCP> Sender: news@amdcad.AMD.COM Reply-To: tim@amd.com (Tim Olson) Distribution: eunet,world Organization: Advanced Micro Devices, Inc. Sunnyvale CA Lines: 32 Summary: Expires: Sender: Followup-To: In article <959@aber-cs.UUCP> pcg@cs.aber.ac.uk (Piercarlo Grandi) writes: | Somebody then offered some DATA points; John Mashey has offered his | recollection that 24-28 is a good number to have on a MIPS (hence their 32), | and some AMD fellow (Tim Olson?) has posted statistics that, using a static | analysis, their compiler can on average fill at most 6+7 registers after | global optimization (I am not clear whether this includes intra expression ^^^^^ Don't you mean "inter" here? | optimization or not), thus providing an upper bound to the number of *useful* | registers. The statistics posted said that, on average, 6.5 global registers (not live across a function call) and 7.0 local registers (live across a function call) were used per function. However, this is certainly not an "upper bound to the number of *useful* registers." As others have pointed out, registers can also be used for parameter passing and return values, emulating a stack cache, etc. | I cannot resist also apologizing, in a different vein :-), to John | Mashey for his opinion that I may not be aware of what has happened | in the latest 15-20 years in compiler research, and for later stating | that I spout falsehoods (numbers, please...); and to Chris Torek's ^^^^^^^^^^^^^^^^^^^^^^^ That was me. I sort of flew off the handle there, but you made certain assertions that *you* have not backed up by any data. -- Tim Olson Advanced Micro Devices (tim@amd.com)