Path: utzoo!attcan!uunet!cs.utexas.edu!rutgers!apple!motcsd!xdos!doug
From: doug@xdos.UUCP (Doug Merritt)
Newsgroups: comp.sys.amiga.tech
Subject: Re: Virtual Memory / doable 1.4 request / Hot links
Message-ID: <296@xdos.UUCP>
Date: 16 May 89 15:14:26 GMT
References: <8905132203.AA27784@postgres.Berkeley.EDU> <17209@usc.edu> <4182@tekig5.PEN.TEK.COM> <24470@agate.BERKELEY.EDU>
Reply-To: doug@xdos.UUCP (Doug Merritt)
Organization: Hunter Systems, Mountain View CA (Silicon Valley)
Lines: 19

In article <24470@agate.BERKELEY.EDU> c60c-1ea@web-1c.berkeley.edu (Yen Yuanchi Hsieh) writes:
[ deleted diagram indicating an MMU between the Amiga graphics chips and
memory ]
>graphics 'controller' + wait states = bad idea.
>
>Just ask any VGA-controller owner.  :-)

It is not impossible to design a zero-wait state MMU, especially one
that might be special purpose like this (e.g. mostly intended for
chip-ram base-address flipping).

I think it's probably possible even to do it at a reasonable price.
The Amiga's clock rate is pretty slow by today's standards; that makes
it easier to conceive ways of slipping in a subsystem that appears
practically instantaneous to the rest of the system.
	Doug
-- 
Doug Merritt		{pyramid,apple}!xdos!doug
Member, Crusaders for a Better Tomorrow		Professional Wildeyed Visionary