Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!deimos.cis.ksu.edu!uxc!uxc.cso.uiuc.edu!mcdurb!aglew
From: aglew@mcdurb.Urbana.Gould.COM
Newsgroups: comp.arch
Subject: Re: E2000
Message-ID: <28200326@mcdurb>
Date: 1 Jun 89 02:43:00 GMT
References: <125@ssp1.idca.tds.philips.nl>
Lines: 26
Nf-ID: #R:ssp1.idca.tds.philips.nl:125:mcdurb:28200326:000:1302
Nf-From: mcdurb.Urbana.Gould.COM!aglew    May 31 21:43:00 1989


>>> connection: Edge's business is selling very-high-end
>>> 68K-compatible boxes built from (I think) CMOS gate arrays, i.e.,
>>> boxes OEMed to cover the high end of your line, if you're 68K-based.
>>> (i.e., this is a strategy somewhat similar to NexGen's for the 386,
>>> I think).  Any postings of data might be useful.
>
>>32 Mbyte boards) but can be configured to 1 Gbyte physical memory when
>>the (4M) chips become available.
>......more data.....
>
>Note that this is one of the first extant examples of building a more
>powerful top end beyond a widespread VLSI micro architecture.
>Others include the NexGen, the DG ECL 88K (both of which have articles
>in the Spring COMPCON, I think: maybe somebody would cite the articles,
>and maybe authors would care to summarize them?), the Prime ECL 486,
>and the PRISMA GaAs SPARC.
>
>This is in interesting trend, which is just the opposite of earlier efforts,
>i.e., people have often done VLSI CMOS versions of earlier
>supermini & mainframe architectures.  [Maybe some citations from VAX-land,
>and, if possible, there's that new Unisys chip that fits into a PC/AT box,
>but runs their mainframe software.]

Actually, isn't the Alliant non-vector instruction set a Motorola 68K take-off?
Or am I giving still more evidence of my faulty memory?