Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!tut.cis.ohio-state.edu!ucbvax!hplabs!hpfcdc!hpislx!hplvli!boyne
From: boyne@hplvli.HP.COM (Art Boyne)
Newsgroups: comp.sys.ibm.pc
Subject: Re: High- vs. low-level languages (Was: Re: Why unix doesn't catch on)
Message-ID: <360015@hplvli.HP.COM>
Date: 19 May 89 14:45:21 GMT
References: <664@tukki.jyu.fi>
Organization: Loveland Inst. Div
Lines: 32

bcw@rti.UUCP (Bruce Wright) writes:

>The CDC 6000 series had a rather strange architecture - in some ways 
>somewhat RISC-like (plus ca change, plus c'est la meme chose).  Each
>word was 60 bits, and instructions could be 15 or 30 bits but could not
                                             ^^^^^^^^
XJ (exchange jump) was a 60-bit instruction.

>cross a word boundary.  One of the compiler's main problems would be 
>re-arranging code to fill each 60-bit word completely to avoid having
>to insert PASS (no-operation) instructions (a problem similar to the 
           ^^^^
Actually, the opcode was NO & was called a no-op or pass instruction.

>delayed branch problem on many RISC machines).  Programming the 6000 
>in assembler would be possible but somewhat disorienting for most 
>assembler programmers.

You forgot to mention that instructions on the CDC 6000 series had
different execution times depending on which part of the 60-bit
word they were in.  This was because prefetch occurred in the
middle of the 60-bit word.  Branch instructions were best stored
in the upper 30 bits to avoid the prefetch.

I did systems programming for the Purdue University Computing Center
while I was a student there, supporting a localized version of the CDC
Algol compiler (written in assembler), among other things.  Graded
the assembly language class, too - while I was taking it, what a
kick!  The professor stopped competing with me on code size &
execution time halfway through the semester.

Art Boyne, boyne@hplvla.hp.com