Path: utzoo!bnr-vpa!bnr-rsc!mlord From: mlord@bnr-rsc.UUCP (Mark Lord) Newsgroups: comp.arch Subject: Re: E2000 (Really Mainframe Architectures) Keywords: 68k compatible, high-performance, Edgcore, Edge, Mainframe, 88k Message-ID: <866@bnr-rsc.UUCP> Date: 5 Jun 89 18:25:43 GMT References: <125@ssp1.idca.tds.philips.nl> <20752@winchester.mips.COM> <26207@ames.arc.nasa.gov> <184@dg.dg.com> Reply-To: mlord@bnr-rsc.UUCP (Mark Lord) Distribution: comp.arch Organization: Bell-Northern Research, Ottawa, Canada Lines: 21 In article <184@dg.dg.com> uunet!dg!rec (Robert Cousins) writes: >In article <26207@ames.arc.nasa.gov> lamaster@ames.arc.nasa.gov (Hugh LaMaster) writes: > >>a clearly and completely defined instruction set architecture > >True there are many guilty here. THis is why DG chose the 88K. It >supports these issues directly. However, not many others do. > Alright.. enough gloating. Not even the latest hot-rod from Moto meets this requirement. There are a large number of instructions which can be encoded differently by varying the numerous "don't care" bits in the instruction words. This isn't exactly the most "clearly and completely defined instruction set" around (mind you, it really looks okay on several other points). -Mark ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Disclaimer: Aliens from Mars made me post this! ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~