Path: utzoo!attcan!uunet!cs.utexas.edu!tut.cis.ohio-state.edu!ucbvax!pasteur!helios.ee.lbl.gov!nosc!ncr-sd!ivory!steves
From: steves@ivory.SanDiego.NCR.COM (Steve Schlesinger x2150)
Newsgroups: comp.arch
Subject: Re: RISC list
Keywords: risc, list
Message-ID: <1447@ncr-sd.SanDiego.NCR.COM>
Date: 8 Jun 89 19:45:56 GMT
References: <1173@cbnewsc.ATT.COM>
Sender: news@ncr-sd.SanDiego.NCR.COM
Reply-To: steves@ivory.SanDiego.NCR.COM (Steve Schlesinger x2150)
Organization: NCR Corporation, Rancho Bernardo
Lines: 34

In article <1173@cbnewsc.ATT.COM> levy@cbnewsc.ATT.COM (Daniel R. Levy) writes:
>Some time ago I asked on this group for information about RISC processors and
>their designers for a list I was compiling.  I promised that I would send
>a copy of this list to whoever wanted it.
>
>	[ stuff deleted ]
>
>Here's the list:
>

	[ many RISC's deleted ]

>Accel		(Celerity)

	The RISC in the Celerity products was designed and built by
	NCR - the NCR/32.  Celerity added register window and floating
	point and other HW around the NCR/32.
	The last Celerity product developed an ECL version of a subset
	of the NCR/32.

	NCR has had RISC's embedded in its proprietary products as
	instruction set emulators since ~1976.
>
>-- 
>Daniel R. Levy             UNIX(R) mail:  att!ttbcad!levy, att!cbnewsc!levy
>AT&T Bell Laboratories
>5555 West Touhy Avenue     Any opinions expressed in the message above are
>Skokie, Illinois  60077    mine, and not necessarily AT&T's.


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steve schlesinger	steve.schlesinger@sandiego.ncr.com
619-485-2150		NCR - 4010, 16550 W Bernardo Dr, San Diego, CA 92127
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