Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!csd4.milw.wisc.edu!leah!rpi!unix.cie.rpi.edu!vicc From: vicc@unix.cie.rpi.edu (VICC Project (Rose)) Newsgroups: comp.lsi Subject: Re: Mixed mode simulation for chip design Summary: mixed mode simulation for chips Message-ID: <5380@rpi.edu> Date: 9 Jun 89 14:20:29 GMT References: <228@mipos3.intel.com> Sender: usenet@rpi.edu Lines: 18 In article <228@mipos3.intel.com>, sundar@mipos2.intel.com (Sundar Iyengar~) writes: > > Has anybody tried applying mixed mode simulation techniques to chip design? > > Any comments? > > Sundar Iyengar Microprocessor Design > Yes I have done some mixed mode simulation for chip design. I have used LASAR in these simulations. Mixed mode simulation seems to be most usefull in simulating complex or time consuming structures which are not on the critical path. If you are not designing a chip which must push the limits of the technology (ie tweaking is not needed) then mixed mode simulation also has some use. Frank Filz Rensselaer Polytechnic Institute Center for Integrated Electronics