Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!uunet!van-bc!ubccs From: lphillips@lpami.wimsey.bc.ca (Larry Phillips) Newsgroups: comp.sys.amiga Subject: Re: GVP 68030 reviewed in Sentry Message-ID: <2461@van-bc.UUCP> Date: 7 Jun 89 23:38:38 GMT Sender: ubccs@van-bc.UUCP Lines: 32 In <1090@elmgate.UUCP>, jeh@elmgate.UUCP (Ed J Hanway CUST) writes: >The GVP 68030 board really looks great (expensive, but great). But nowhere do >the reviewers mention whether the 32-bit memory can accept 16-bit DMA (i.e. >from a 2090A or HardFrame or other "high-performance" hard disk controller). >Does anyone have any information on this? I think I'd take a real performance >hit if I had to set my HardFrame up to DMA into chip memory. (Not that it's >really THAT slow, but compared to 80ns 32 bit nibble mode RAM, it might as >well be core.) According to someone in the 'engineering department' at GVP, you can indeed do 16 bit DMA into their 32 bit ram, but they do not recommend it. The problem is that the 68030 has a data cache as well as an instruction cache. If it has something in its cache, and that same data is modified by an external DMA transfer, the cache will no longer reflect the real value of the data. There are only two choices here, one being to disable the cache (I don't know if you can disable data cache separately from instruction cache), and the other is to use a 'Mask = ' entry in the mountlist to limit DMA to the 16 bit memory. GVP claims that it is better to do the latter, since the 68030 is fast enough to make the programmed IO transfer speeds go very quickly. -larry -- Van Roy's Law: An unbreakable toy is useful for breaking other toys. +----------------------------------------------------------------------+ | // Larry Phillips | | \X/ lphillips@lpami.wimsey.bc.ca or uunet!van-bc!lpami!lphillips | | COMPUSERVE: 76703,4322 | +----------------------------------------------------------------------+