Path: utzoo!attcan!uunet!bfmny0!tneff
From: tneff@bfmny0.UUCP (Tom Neff)
Newsgroups: comp.sys.intel
Subject: Re: PLM vs. C for 80286/80386
Keywords: PLM C
Message-ID: <14390@bfmny0.UUCP>
Date: 8 Jun 89 15:29:14 GMT
References: <598@philtis.UUCP> <14381@bfmny0.UUCP> <1765@auspex.auspex.com> <14386@bfmny0.UUCP> <4448@ficc.uu.net>
Reply-To: tneff@bfmny0.UUCP (Tom Neff)
Organization: ^
Lines: 17

In article <4448@ficc.uu.net> peter@ficc.uu.net (Peter da Silva) writes:
>So you're saying that iC86 produces worse code than Ritchie's vintage 1974
>or so C compiler...

Actually in response to a mailed suggestion I went back and tried my 
test program with varying numbers of cases. It turns out that if you 
have *6 or more* cases, iC-x86 generates a jump table; 5 or fewer, it 
does it elseif-style. This appears to be more of a space optimization 
than anything else; my experience with critical realtime code is that 
speed optimizations are more important for things like interrupt 
handlers. It would be nice if Intel allowed some programmer control 
over this behavior for those who *really care* (myself among them). 
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Tom Neff				UUCP:     ...!uunet!bfmny0!tneff
    "Truisms aren't everything."	Internet: tneff@bfmny0.UU.NET