Path: utzoo!attcan!utgpu!jarvis.csri.toronto.edu!rutgers!tut.cis.ohio-state.edu!ucbvax!decwrl!hplabs!hpda!hpcuhb!hpcllla!hpclisp!hpclscu!shankar
From: shankar@hpclscu.HP.COM (Shankar Unni)
Newsgroups: comp.unix.wizards
Subject: Re: Optimal for loop on the 68020.
Message-ID: <26270007@hpclscu.HP.COM>
Date: 6 Jun 89 20:40:34 GMT
References: <11993@well.UUCP>
Organization: Hewlett-Packard Calif. Language Lab
Lines: 31

>     for ( i = 0; i < COUNT; i++ )
>     for ( i = 0; i < COUNT; ++i )
>     for ( i = 0; ++i <= COUNT; )
>     for ( i = 0; i++ < COUNT; )
>     for ( i = COUNT; i > 0; i-- )
>     for ( i = COUNT; i > 0; --i )
>     for ( i = COUNT; --i >= 0; )
>     for ( i = COUNT; i-- > 0; )
> 
> I would be interested to see similar checks done on different
> architectures; in particular RISC machines, which supposedly are
> designed in cooperation with the compiler writers.
 
On the HP Precision Architecture (HP9000 series 800's), all the above loops
except the last one generate a two-instruction loop + set-up:

        COPY    0,23            ; zero-out reg 23
        LDI     127,31          ; load-immediate into reg 31
        LDO     1(23),23        ; this is a copy of the instruction below
                                ; (should have been folded with the COPY).
        COMBF,<=,N   31,23,.    ; compare and branch if false       [LOOP]
        LDO     1(23),23        ; increment i  (LDO = LoaD Offset)  [LOOP]

The compare-and-branch to itself, with the increment in the delay slot
of the branch, is the tightest possible loop.

In the last for loop (only), a three instruction loop is generated, because
of the slightly more complicated code for "i-- > 0".
----
Shankar Unni.
HP California Language Lab.