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From: nelson@m.cs.uiuc.edu
Newsgroups: comp.arch
Subject: Re: pseudo-static RAM
Message-ID: <3300088@m.cs.uiuc.edu>
Date: 15 Dec 89 01:34:45 GMT
References: <20080@<2583B758>
Lines: 6
Nf-ID: #R:<2583B758:20080:m.cs.uiuc.edu:3300088:000:221
Nf-From: m.cs.uiuc.edu!nelson    Dec 14 14:12:00 1989


I'm familiar with static and dynamic RAM from both a VLSI and actual use
  level, but I've never heard of "pseudo-static RAM."  Does anyone care
  to explain and describe what it looks like at a transistor level?

Danke!