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From: crisp@mips.COM (Richard Crisp)
Newsgroups: comp.arch
Subject: Re: pseudo-static RAM
Message-ID: <33705@mips.mips.COM>
Date: 15 Dec 89 05:36:02 GMT
References: <20080@<2583B758> <3300088@m.cs.uiuc.edu>
Sender: news@mips.COM
Reply-To: crisp@mips.COM (Richard Crisp)
Organization: MIPS Computer Systems, Sunnyvale, CA
Lines: 10

Pseudo static RAMs are dynamic RAMs at the transistor level. They auto-refresh
and the most tricky part of designing one (besides all the ususal DRAM stuff)
is the design of the arbiter that handles simulataneous refresh and access 
requests.
I believe that Toshiba is a big player in the Pseudo-Static market and I 
understand that they are making good inroads in the slow static market.
(you get DRAM density, with the ease of the use of an SRAM).

-- 
Just the facts Ma'am