Path: utzoo!utgpu!jarvis.csri.toronto.edu!clyde.concordia.ca!uunet!mcsun!ukc!dcl-cs!aber-cs!pcg
From: pcg@aber-cs.UUCP (Piercarlo Grandi)
Newsgroups: comp.arch
Subject: Re: Japanese Josephson breakthrough?  Implications?
Summary: Was the Z8000 something liek 17,000 devices or whatever?
Message-ID: <1546@aber-cs.UUCP>
Date: 20 Dec 89 17:40:32 GMT
Reply-To: pcg@cs.aber.ac.uk (Piercarlo Grandi)
Organization: Dept of CS, UCW Aberystwyth
	(Disclaimer: my statements are purely personal)
Lines: 24

In article <25177@cup.portal.com> mmm@cup.portal.com (Mark Robert Thorson)
writes:

    Hmmm...  26,000 devices, that's about 1.5 ENIAC's?  I wonder what sort of
    architecture they used?  The most useful things I can think of at that
    level would be a rasterizing engine and a cryptographic machine.

I may be entirely wrong, but the Z8000, which is not a terribly useless
processor, and used to run Unix multiuser without trouble at the level of a
PDP-11/44 or a VAX 750, was something like 17,000 gates/transistors/devices
or whatever (yes, I know that the "whatever" matters), which is in the same
ballpark. Anybody knows better?

Actually, has anybody thought of the Z8000 as a "RISC"/simple machine (sure
the architecture was clean enough), and/or thought doing it in GaAs or other
fast, low density technology?

In case you have not understood, I liked the Z8000 a lot. If only IBM had
chosen it instead of the 8088/8086... If only Zilog had managed to do an MMU
and restartable instructions soon enough...
-- 
Piercarlo "Peter" Grandi           | ARPA: pcg%cs.aber.ac.uk@nsfnet-relay.ac.uk
Dept of CS, UCW Aberystwyth        | UUCP: ...!mcvax!ukc!aber-cs!pcg
Penglais, Aberystwyth SY23 3BZ, UK | INET: pcg@cs.aber.ac.uk