Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!think!bbn!granite!anderson
From: anderson@granite.cr.bull.com (David Anderson)
Newsgroups: comp.sys.mips
Subject: Gary Kane++
Keywords: 16K pages in the 6000
Message-ID: <1989Dec21.150346.10211@granite.cr.bull.com>
Date: 21 Dec 89 15:03:46 GMT
Distribution: usa
Organization: Bull HN Information Systems Inc.
Lines: 18


     Just wondering...

     It seems that MIPS has thrown out "upward compatibility" in designing 
     the 6000, since "/usr/include/sys/immu_r6000.h" defines 16K pages,
     a resulting difference in the TLB EntryLo register, i.e. a 22 bit PFN, 
     and of course a change in all of the page-size-related constants.

     Is there an addendum or update to Gary Kane's book that outlines
     the differences between MIPS current processor line and the upcoming
     6000?  

==============================================================================
     Dave Anderson                     
     Bull HN Information Systems       anderson@granite.cr.bull.com
     300 Concord Road.
     Billerica, MA 01862               508-671-3253
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