Path: utzoo!utgpu!jarvis.csri.toronto.edu!clyde.concordia.ca!uunet!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!brutus.cs.uiuc.edu!jarthur!uci-ics!honig From: honig@ics.uci.edu (David A. Honig) Newsgroups: comp.arch Subject: Re: Context switching on RISC chips Message-ID: <25A13AB0.24734@paris.ics.uci.edu> Date: 2 Jan 90 23:35:12 GMT References: <3167@iitmax.IIT.EDU> <28573@amdcad.AMD.COM> <52104@srcsip.UUCP> Reply-To: David A. Honig Organization: University of California, Irvine - Dept of ICS Lines: 23 In article <52104@srcsip.UUCP> shankar@src.honeywell.com (Subash Shankar) writes: >In article <28573@amdcad.AMD.COM> tim@amd.com (Tim Olson) writes: > ># 3) Saving/Restoring Live Registers Only (like your #2). In systems ># where security (covert channels) is not an issue (as in most ># real-time embedded control systems), the context-switch time can ># be reduced by saving only the live local registers found between ># the current stack pointer and the top of the stack cache. > >Why does security affect things here? >Subash Shankar Honeywell Systems & Research Center Isn't it obvious? The contents of registers, if not overwritten, provides a 'hidden' communication path between processes. If you worry about that then your context switches will have to do more work. And I don't do either architecture or security professionally! -- David A. Honig "As these houses are built, the lions continue to wander around those areas, and they bump into a poodle or a German shepard. That causes some trouble." ---Prof. R. Barrett, UCB