Path: utzoo!utgpu!jarvis.csri.toronto.edu!clyde.concordia.ca!uunet!bnrgate!bnr-fos!bigsur!bnr-rsc!bcarh185!schow
From: schow@bcarh185.bnr.ca (Stanley T.H. Chow)
Newsgroups: comp.sys.amiga
Subject: Re: 68040 vs 80246 (Was Re: Xerox sues Apple!!!)
Message-ID: <1627@bnr-rsc.UUCP>
Date: 23 Dec 89 09:14:00 GMT
References: <936@lpami.wimsey.bc.ca>
Sender: news@bnr-rsc.UUCP
Reply-To: bcarh185!schow@bnr-rsc.UUCP (Stanley T.H. Chow)
Organization: BNR Ottawa, Canada
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In article <936@lpami.wimsey.bc.ca> lphillips@lpami.wimsey.bc.ca (Larry Phillips) writes:
>In <1617@bnr-rsc.UUCP>, schow@bcarh185.bnr.ca (Stanley T.H. Chow) writes:
>>In article <824@mindlink.UUCP> a218@mindlink.UUCP (Charlie Gibbs) writes:
>>>
>>>Does anyone have any more horror stories?
>>>
>>
>>How about the inconsistancy between 68000 & 68010? (Specifically the MOVESR
>>problem).
>
>The 'inconsistency', as you call it, is a bug fix. Is it a big deal for you?
>Was it worth leaving in the machine so future genrations of the chip would have
>to have ever more kludges to work around the problem?

You know, Charlie Gibbs asked for horror stories, I pointed out the MOVESR
*inconsistancy* and here you are calling it a *bug*! Boy, are you gonna to
get flamed by the Motorola-lovers. :-)

It sure is nice to have my point confirmed by experts like Larry (and Dave).


>
>>For myself, I prefer the Intel approach - that is, make the successors
>>have exactly the same bugs as well. That way, a pin-compatible '010 will
>>really be pin-compatible.
>
>You are one sick puppy. You remind me of the fellow with the broken watch who
>won't get it fixed because he is used to the way it loses time, and having one
>that worked would only confuse him.


You are one closed-minded loud-mouth sicko bleeding-heart conservertive.

Now that I called you names right back, feel better? Shell we get on with
a discussion with information? Would you like to tell me *why* you object
to that approach?


>>How about the '020 MMU being a subset of the '851 MMU? Not a bug, but
>>certainly an extremely undesirable feature for a later member of any
>>architecture family.
  ^^^^^^^^^^^^^^^^^^^^
>
>Undesirable feature? How would you suggest implementing the I/O stuff, when the
>MMU has been moved inboard and made inaccesible to the I/O?

Are you saying there is no other difference? As I recall, the difference is
quite a bit more than that. But then, I haven't checked the details for
quite sometime.


>
>Tell me.. how many 8080's are in the latest CPU array from Intel?

I don't know. Why do you ask?

Ohh, I get it. This is a clever way of saying that Intel does as badly as
Motorola!

It is really strange and annoying that critizism of Mac's automatically
trigger attacks on PC's, any discussion of Motorola gets Intel draged in
as well. Why can't we discuss the 68K on its own merits? Do you consider
its case so weak that you have to bloster it with weaknesses of other
processors?

In any case, your question is truly unrelated to this discussion. I was
talking about members of one architecture family.

>
>--
>" All I ask of my body is that it carry around my head."
>         - Thomas Alva Edison -
>+-----------------------------------------------------------------------+ 
>|   //   Larry Phillips                                                 |
>| \X/    lphillips@lpami.wimsey.bc.ca -or- uunet!van-bc!lpami!lphillips |
>|        COMPUSERVE: 76703,4322  -or-  76703.4322@compuserve.com        |
>+-----------------------------------------------------------------------+


Stanley Chow        BitNet:  schow@BNR.CA
BNR		    UUCP:    ..!psuvax1!BNR.CA.bitnet!schow
(613) 763-2831		     ..!utgpu!bnr-vpa!bnr-rsc!schow%bcarh185
Me? Represent other people? Don't make them laugh so hard.