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From: mslater@cup.portal.com (Michael Z Slater)
Newsgroups: comp.arch,comp.sys.intel
Subject: Re: 80960KA and KB
Message-ID: <25274@cup.portal.com>
Date: 22 Dec 89 17:00:42 GMT
References: <1989Dec20.014428.9785@daver.UU.NET>
  <1989Dec22.055206.4848@daver.UU.NET>
Organization: The Portal System (TM)
Lines: 24

>>Does anyone know the die size and technology used on the 80960KA and
>>80960KB parts?
>
>Well - the die size is 400x400, in case anyone is interested. No one
>replied, so we cracked one open to have a peek. The pads are all
>on one corner of the die (strange, just like the pinout :-), and they
>appear to use a multi-layer assembly to carry the signals to the
>external PGA pins. The die looks packed, with features right to
>the edge where there are not pads. I assume that it is 1.2 micro
>geometry, but we haven't checked this yet. If anyone has more
>information, please let me know.

My notes say 350,000 transistors.  I assume this is what is actually on
the chip, which is much more than it takes to implement the specified
KA/KB functions.  Even chips sold as KA's include not only the KB and MC
functions, but also stuff for BiiN that has never been documented by Intel
for their customers.

The real question of interest is "how many transistors would it take to
implement a 960KA" -- assuming that no FPU, MMU, etc was included.

Michael Slater, Microprocessor Report   mslater@cup.portal.com
550 California Ave., Suite 320, Palo Alto, CA 94306
415/494-2677   fax: 415/494-3718