Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!sun-barr!decwrl!nsc!voder!dtg.nsc.com!andrew From: andrew@dtg.nsc.com (Lord Snooty @ The Giant Poisoned Electric Head ) Newsgroups: comp.ai Subject: Re: Building a brain, revisited Summary: brain dead? Keywords: brain computer MIPS Message-ID: <140@daedalus.nsc.com> Date: 9 Jan 90 22:53:33 GMT References: <15439@well.UUCP> Distribution: comp Organization: National Semiconductor, Santa Clara Lines: 9 John Nagle - you make interesting reading, but neglect to mention one critical performance parameter for the proposed architecture, namely the interprocessor bandwidth. This is what differentiates the "neural" approach chiefly from the "throw MIPs/MFLOPs at it" approach. Any comments? -- ........................................................................... Andrew Palfreyman andrew@dtg.nsc.com Albania before April!