Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!umich!yale!cs.utexas.edu!sun-barr!decwrl!ucbvax!hplabs!hpfcso!dgr
From: dgr@hpfcso.HP.COM (Dave Roberts)
Newsgroups: comp.arch
Subject: Re: Sanity Check, please
Message-ID: <8840007@hpfcso.HP.COM>
Date: 9 Jan 90 22:23:19 GMT
References: <Jan.8.22.57.41.1990.234@klaatu.rutgers.edu>
Organization: Hewlett-Packard, Fort Collins, CO, USA
Lines: 33


Josh writes:

>I'd like people's reactions to these predictions on microprocessor
>technology by the turn of the century.  They are intended to 
>indicate something on the order of "state of the art but commercially
>available", use the "1990" column to guess what level I'm getting at.
>("pins" is high but intended to indicate more state of the art;
>I really just guessed at memory speeds ca. 1980.)
>
>what            1980    1990    extrapolation   2000
>processor
>pins		64	256	x4		1k
>clock		8MHz	32MHz	x4		128MHz
>"Devices"	50k	1M	x20		20M
>mips		1	12	x12		144
>memory(dram)
>bits/chip	16k	1M	x64		64M
>speed		240ns	80ns	/4		20ns
>
>--JoSH
>----------

Well, I've got to say, clock seems a bit low by the year 2000, as number
of pins seems high.  I doubt that bus widths will grow too much internally
to processors (although external bus widths probably will).  That will tend
to limit the pin expansion as will packaging limitations.  There will have
to be some *big* advances in packaging to support that rate of growth.
Clock speed should definitely (at current growth rates) exceed that (assuming
state of the art).  The other stuff I could believe (of course MIPS would
scale with processor speed, as would the "speed" parameter).

-- Dave