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From: rpw3@rigden.wpd.sgi.com (Robert P. Warnock)
Newsgroups: comp.arch
Subject: Re: The Killer Micro From Hell [Really: fight ...
Message-ID: <47942@sgi.sgi.com>
Date: 10 Jan 90 19:22:28 GMT
References: <34030@mips.mips.COM> <4322@nttmhs.ntt.JP> <39807@ames.arc.nasa.gov> <3101@umn-d-ub.D.UMN.EDU> <40043@ames.arc.nasa.gov> <47800@sgi.sgi.com>
Sender: rpw3@rigden.wpd.sgi.com
Reply-To: rpw3@rigden.UUCP (Robert P. Warnock)
Organization: Silicon Graphics, Inc., Mountain View, CA
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As several people have pointed out, my recent article <47800@sgi.sgi.com>
had a couple of typos and a`bug in it. Consider this a retraction/correction:

First, when I said ANSI X3T9.3 HPPI-PH was either 125MB/s or 250MB/s,
that was a typo. I have had the bit->baud expansion of 4b/5b coding on
the brain lately, so for some stupid reason I multiplied the correct
numbers by 1.25 when posting! The data rate of HPPI is of course 100 or
200 MB/s (800 or 1600 Mb/s), depending on whether you have a 32 or 64
bit data path, respectively. (It's a 25MHz word rate in either case.)

And when I attributed the trademark "HSC" to Cray, I was confused. HPPI
was modelled after Cray HSX, to be sure, but "HSC" is a *DEC* trademark.

I apologize for the inaccuracies.

-Rob


-----
Rob Warnock, MS-9U/510		rpw3@sgi.com		rpw3@pei.com
Silicon Graphics, Inc.		(415)335-1673		Protocol Engines, Inc.
2011 N. Shoreline Blvd.
Mountain View, CA  94039-7311