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From: palumbo@cs.Buffalo.EDU (Paul Palumbo)
Newsgroups: comp.graphics
Subject: Connected Component Algorithm
Message-ID: <15695@eerie.acsu.Buffalo.EDU>
Date: 11 Jan 90 19:10:35 GMT
Sender: nobody@acsu.Buffalo.EDU
Reply-To: palumbo@cs.Buffalo.EDU (Paul Palumbo)
Organization: SUNY/Buffalo Computer Science
Lines: 28

I was wondering if anybody out there in net-land knows an image analysis 
technique to locate connected components in digital images.  In particular,
I am looking for an algorithm that can be implemented in hardware that makes
only one pass through the image in scan-line order and reports several simple
component features such as component extent (Minimum and Maximum X and Y 
coordinates) and the number of foreground pixels in the component.

The project I am on is planning to design and develop custom image analysis
hardware to do this. We have developed an algorithm locally and was wondering
if somebody else has an easier method.


I know about the LSI Logic "Object Contour Tracer Chip" but this chip appears 
to be too powerful (and slow) for this application.   I had found some papers
by Gleason and Agin dated about 10 years ago but could not find the exact 
details of their algorithm. 

Does anybody else have a need for such hardware?

Any help or pointers on locating such an algorithm would be appreciated.

 
Paul Palumbo                    internet:palumbo@cs.buffalo.edu
Research Associate              bitnet:  palumbo@sunybcs.BITNET
226 Bell Hall                   csnet:   palumbo@buffalo.csnet
SUNY at Buffalo  CS Dept.
Buffalo, New York 14260
(716) 636-3407    uucp:   ..!{boulder,decvax,rutgers}!sunybcs!palumbo