Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cs.utexas.edu!uunet!rosevax!bert.Rosemount.COM!bill From: bill@bert.Rosemount.COM (William M. Hawkins) Newsgroups: comp.realtime Subject: Re: Data acquisition/control on i386 Message-ID: <8461@rosevax.Rosemount.COM> Date: 5 Jan 90 04:48:16 GMT References: <1989Dec10.094755.21999@me.toronto.edu> <1989Dec28.104004.5697@me.toronto.edu> <1990Jan4.074652.1026@stag.UUCP> Sender: news@rosevax.Rosemount.COM Reply-To: bill@bert.Rosemount.COM (William M. Hawkins) Organization: Rosemount Inc., Burnsville, MN Lines: 33 In article <1990Jan4.074652.1026@stag.UUCP> trb@stag.UUCP ( Todd Burkey ) writes: >In article <1989Dec28.104004.5697@me.toronto.edu> kokody2@me.utoronto.ca writes: >>Also of interest is >>how robust the data acquisition/control is under varying machine loads. > >Very robust, since our controllers use an extremely tunable analog PID >configuration. Todd, what do you mean by "extremely tunable"? It has been my experience that PID's are not tuned to constants (P, I, and D) with more than a few significant digits, because the real world conspires to change the gains and time constants of electro- mechanical devices. The Nyquist stability criterion is usually met with some safety factor, called phase margin. The original question dealt with stability under varying machine loads. This becomes a problem when the dead time between taking a measurement and manipulating the output is more than 10 percent of the dominant lag time. If the external process has transport lag, add that to the processing time. The sampling and controlling interval is not dead time. It can be a problem when it is more than 25% of the dominant lag. That is, it is not dead time unless you wait until the start of the next interval to send the outputs from the last interval. bill@bert.rosemount.com P.S. We make process control systems that usually operate pneumatic valves from 1/2 to 48 inches in diameter. We use Motorola 68xxx processors, with a proprietary operating system written in C under UNIX. It is optimized to minimize delays in handling clock tick interrupts.