Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!rpi!zaphod.mps.ohio-state.edu!tut.cis.ohio-state.edu!ucbvax!decwrl!sgi!wiltse@oceana.esd.sgi.com From: wiltse@oceana.esd.sgi.com (Wiltse Carpenter) Newsgroups: comp.sys.sgi Subject: Re: A Question about SIMMS for IRIS 4D/25 Summary: 4MB simm story not correct on 4D/2x Message-ID: <47911@sgi.sgi.com> Date: 10 Jan 90 05:07:47 GMT References: <9001051539.AA13873@aero4.larc.nasa.gov> Sender: wiltse@oceana.esd.sgi.com Organization: Silicon Graphics, Inc., Mountain View, CA Lines: 20 In article <9001051539.AA13873@aero4.larc.nasa.gov>, blbates@AERO4.LARC.NASA.GOV ("Brent L. Bates AAD/TAB MS294 x42854") writes: > > I have been told that the 4D/20 and 4D/25 use the same memory. > However, if you want 32Mb of memory on the main board you have to use > 4Mb SIMMS, ALL of them must be the same. So, if you currently have > 1Mb SIMMS, you will have to remove them and replace them with the > 4Mb SIMMS. Whoever told you that 4D/20 and 4D/25 machines use the same memory was right. However, the 32MB maximum memory is achieved by using double- high 1 MB SIMMs, not 4MB ones. They don't all have to be the same, but there are restrictions on mixing them. Basically, it doesn't work to have ``holes'' in the physical memory map. Complicating the matter is the way memory addressing works with dual height SIMMS: one layer at a time. So, all of the SIMM sockets must at least have single high SIMMs in them before the first set of sockets can support double-high ones. 4MB SIMMs haven't yet been qualified for the 4D/2x line and may require a PROM fix to some machines; we're working on it. -Wiltse Carpenter