Xref: utzoo comp.unix.questions:18973 comp.unix.wizards:20127
Path: utzoo!attcan!uunet!unhd!rg
From: rg@uunet!unhd (Roger Gonzalez )
Newsgroups: comp.unix.questions,comp.unix.wizards
Subject: SCSI Questions
Message-ID: <1990Jan8.180709.3440@uunet!unhd>
Date: 8 Jan 90 18:07:09 GMT
Reply-To: rg@unhd.UUCP (Roger Gonzalez )
Distribution: comp
Organization: Marine Systems Engineering Lab
Lines: 34

I'm writing a SCSI driver for a optical WORM drive (I know, reinventing
the wheel..).  My development/test environment is UNIX, and I then download
the code to target boards running pSOS.

I am using an Ironics IV-3273 System Controller card, which has a NCR-5380
SCSI chip on it.

My questions:

In the SCSI spec, they say that the target controls the C/D, MSG, and
I/O bits.  Fine.  In this case, why is there a "target control register"
on the chip, which in the code examples I have, is used by the initiator
to "Assert C/D, I/O, or MSG".  Isn't this a contradiction? If it is, how
am I supposed to get the bus into (for example) Command phase so that I
can send a command to the target?

In the spec, they say things like "wait one bus settle delay".  Does
this kind of picky solder-jockey timing become an issue for me as a
programmer?

Does this code just lend itself to ugly inelegant programming, or am I
just losing my touch?  Do you get forced to program like a raw-meat-eating
Real Programmer whenever you talk to chips directly?  What's up?

Thanks,
Roger



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