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From: davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr)
Newsgroups: comp.arch
Subject: Re: RISC Machine Data Structure Word Alignment Problems?
Message-ID: <2081@crdos1.crd.ge.COM>
Date: 2 Feb 90 14:09:46 GMT
References: <111@melpar.UUCP> <1990Jan21.224826.1699@esegue.segue.boston.ma.us> <S4B1L47xds13@ficc.uu.net> <1871@l.cc.purdue.edu> <KMD168Axds13@ficc.uu.net> <3428@odin.SGI.COM> <4YG1638xds13@ficc.uu.net>
Reply-To: davidsen@crdos1.crd.ge.com (bill davidsen)
Organization: GE Corp R&D Center, Schenectady NY
Lines: 14

In article <4YG1638xds13@ficc.uu.net> peter@ficc.uu.net (Peter da Silva) writes:

| And ajacent 4-, 5-, 6-, and 12- bit integers as well. I've heard of bit
| addressible memory, but outside of microcontrollers I've never actually
| seen it.

  I *think* the Intel 432 has bit addressibility. I don't have my manual
(yes I kept one) here, and I evaluated it about the time of first
engineering samples.

  It was ahead of its time.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
            "Stupidity, like virtue, is its own reward" -me