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From: rmb@mipon2.intel.com (Bob Bentley)
Newsgroups: comp.arch
Subject: Re: structures
Summary: Ada has it now!
Message-ID: <5503@omepd.UUCP>
Date: 1 Feb 90 21:46:52 GMT
References: <1810@sunquest.UUCP> <22197@mimsy.umd.edu>
Sender: news@omepd.UUCP
Reply-To: rmb@mipon2.UUCP (Bob Bentley)
Organization: Intel Corp., Hillsboro, Oregon
Lines: 41

In article <22197@mimsy.umd.edu> chris@mimsy.umd.edu (Chris Torek) writes:
>
>This does not really cover all the possibilities.  I think these
>attributes do:
>
> A. unordered structures: the compiler may rearrange these to save
>    space.
> B. packed unordered structures: the compiler may rearrange these, and
>    should favor space over time everywhere, to the extent of generating
>    slow instruction sequences.
> C. external (packed and ordered) structures: the compiler may neither
>    rearrange them, nor insert any padding.  These structures must also
>    allow bit fields and bit and byte level ordering.
>

Note that Ada (gulp!) already supports these 3 paradigms :

A - corresponds to the standard record type

B - is provided via pragma PACK, which ".. specifies that storage minimization
    should be the main criterion when selecting the representation of a record
    or array type"

C - is provided via a representation clause, which ".. can be provided to give
    more efficient representation or to interface with features that are outside
    the domain of the language (for example, peripheral hardware)"

See Chapter 13 of the Ada LRM (ANSI/MIL-STD-1815A) for more details.

As a point of information, the Intel 80960 architecture allows unaligned data
accesses to and from memory with some performance penalty (moderate if the
access falls entirely within a single 16-byte block, more severe if it spans a
16-byte boundary).

	Bob Bentley

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