Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!mips!winchester!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: Handling mis-alignment (was Re: RISC Machine Data Structure Word Alignment Problems? Message-ID: <35488@mips.mips.COM> Date: 4 Feb 90 19:20:11 GMT References: <3428@odin.SGI.COM> <2038@bnr-rsc.UUCP> <1577@mipos3.intel.com> Sender: news@mips.COM Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Inc. Lines: 20 In article <1577@mipos3.intel.com> kds@blabla.UUCP (Ken Shoemaker) writes: >The i486 handles misaligned transfers transparently from the programming ... >In addition, the i486 has the ability to force traps on all misaligned >transfers. This lets people insure that the data structures for their 1) That's a very nice feature, like what we once asked IBM to add to S/370s. I hope it gets plenty of use. 2) Although coming from the other direction, what MIPS does is: a) If you say nothing, trap misaligned references (killing process). b) On request, trap misalignment, and either fix them up, or fix them up, and keep a record of where they occurred, to help the user figure out what's happening. c) If you recompile the program and request it, the unaligned operations get generated. -- -john mashey DISCLAIMER: UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086