Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!mips!apple!sun-barr!newstop!sun!bus!borrill From: borrill@bus.Sun.COM (Paul Borrill) Newsgroups: comp.arch Subject: Re: Bus Partitioning? Keywords: Bus Partitioning Message-ID: <131288@sun.Eng.Sun.COM> Date: 6 Feb 90 04:58:33 GMT References: <1990Jan30.174807.14657@ncsuvx.ncsu.edu> Sender: news@sun.Eng.Sun.COM Reply-To: borrill@sun.UUCP (Paul Borrill) Organization: Sun Microsystems, Mountain View Lines: 71 In article <1990Jan30.174807.14657@ncsuvx.ncsu.edu> aras@ecerl3.UUCP () writes: >Has anyone in the group run across articles, research, etc, on >partitioning of single or multiple buses to create independent bus >segments? I am planning to work on this, to partition the buses on the >fly, reflecting changes in the locality of data exchanges among the >processes. >T >The idea is this: > >Given N processors all attached to a single bus. If several processes >on processors have a high percentage of data communication among >themselves (among these processors) why not: > > - assign these processes to processors that are physically >adjacent on the bus > - Partition the bus so that it turns into several bus "segments" >each independent of each other > - For global communucation, use a second bus, or, if only >segment to segment communication is necessary, combine two segments on >the fly. > >Responses will be appreciated. > > >Caglan M. Aras aras@eceris.ncsu.edu| Experts know more and >N. C State Univ. | more about less and >ECE Dept. Robotics Lab | less till they know >Raleigh, NC 27695 | everything about nothing! The question you are asking has been a hot topic in the Futurebus+ working group over the past year, and many of the tough issues, including deadlock, hierarchical cache protocols and address management have been included in the P896.1 Futurebus+ Specifications. You can get an overview of the Futurebus+ family of standards (called "What is Futurebus+") from the VME International Trade Association, phone (602) 951-8866. I tried publishing it on here, but whoever moderates this category must have blocked it, probably due to its size. The P896.1 Spec has just been released from the Working Group: IEEE P896.1: Futurebus+ Draft 8.2, Published February, 1990, by the IEEE Computer Society, 1730 Massachusetts Avenue, N.W., Washington, D.C. 20036-1903. Call 1-800-CS-BOOKS. The Futurebus Working Group currently has over 800 people on its mailing list, and meets every other month for a week-long Workshop. Over 100 companies are actively involved in the final stages of its definition. This is a VERY LARGE IEEE activity. Anyone who is seriously interested in the Futurebus+, or the related activites, is strongly urged to consider attending the meetings. (As an IEEE activity, all meetings are open to the public, however Working Group rules require that you attend at least two of the past four meetings in order to vote). The Futurebus+ Mailings (which are about 1-1/2" thick, and are issued every other month), are available from the Futurebus+ Executive Secretary, Anatol Kaganovich at (408) 991-2599. A great deal of material on multiple segment buses has appeared here in the past. Back copies of mailings can be obtained from Lisa Granoien at the IEEE Computer Society (202) 371-0101 The next IEEE Futurebus+ Workshop will be held at the DoubleTree Hotel, Santa Clara, from March 12 through March 16, 1990. Information on meeting agendas, special events etc., can be obtained from the Futurebus+ Information center, at VITA, Phone 602-951-8866. Kind regards, Paul.