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From: tim@nucleus.amd.com (Tim Olson)
Newsgroups: comp.arch
Subject: Re: Fault Tolerance
Message-ID: <29059@amdcad.AMD.COM>
Date: 5 Feb 90 21:59:29 GMT
References: <13910004@hpisod2.HP.COM> <13910009@hpisod2.HP.COM> <35300@mips.mips.COM> <1990Feb2.035201.21073@tandem.com> <7840@pt.cs.cmu.edu>
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In article <7840@pt.cs.cmu.edu> lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay) writes:
| In article <1990Feb2.035201.21073@tandem.com> jimbo@tandem (Jim Lyon) writes:
| >TMR schemes
| >try to shoot the insane processor before it manages to poison the
| >outside world. 
| 
| Ah, TMR?? Thread Maintenance and Repair??? Test, Monitor, Recovery???

Triple Modular Redundancy.  This is a 3-way voting scheme where each
output is generated by 3 modules and checked.  The final output is
subject to "majority rule".

	-- Tim Olson
	Advanced Micro Devices
	(tim@amd.com)