Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!samsung!uakari.primate.wisc.edu!ames!attctc!convex!swarren From: swarren@convex.com (Steve Warren) Newsgroups: comp.sys.amiga Subject: Re: A2630 questions Summary: Just a little interesting DRAM info Message-ID: <4851@convex.convex.com> Date: 23 Jan 90 21:12:56 GMT References: <1251@crash.cts.com> <9442@cbmvax.commodore.com> Sender: usenet@convex.com Organization: Convex Computer Corporation; Richardson, TX Lines: 19 About the 64M daughter card, now that the 4Mbit DRAM chips are in production we can get 4Mbytes on an 8-chip simm, which means, let's see... ...16 simms for 64M, yes that does seem a little excessive for a daughter-card ;^). It should be possible to build a 0-wait-state memory board for the '030 now, though, since Hitachi has just come out with these speedy little 35ns 1Mbit DRAMs. Unfortunately they are selling for >$100 each right now :(. (They just started sampling, I understand - I hope to get some literature on these chips soon). They may not have improved the overall cycle time that much. I understand the access time improvement was achieved primarilly by de-muxing the address lines. None of the press releases give precharge or cycle times. -- --Steve ------------------------------------------------------------------------- {uunet,sun}!convex!swarren; swarren@convex.COM