Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!apple!baum
From: baum@Apple.COM (Allen J. Baum)
Newsgroups: comp.arch
Subject: Parity (was: Time between memory failure)
Message-ID: <38420@apple.Apple.COM>
Date: 7 Feb 90 18:20:51 GMT
References: <1911@sunquest.UUCP>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 25

[]
>In article <1911@sunquest.UUCP>terry@sunquest.UUCP (Terry Friedrichsen)writes:
>
>Now wait.  I've seen a couple of instances of memory parity errors on
>fairly new PCs.  Are you really trying to say that I'd be better off
>not knowing about memory parity errors, and I should just let programs
>quietly screw up?  Or am I missing your point in some way?  I know your
>article addressed soft chip errors exclusively, but your conclusion seems
>a bit strong.
>
>Memory reliability involves more than just the RAM chip itself; there's
>many a slip twixt the chip and the CPU.  I'll buy the idea that errors
>are so infrequent that ECC is unnecessary overkill, but sorry, I just
>GOTTA have that parity check ...

Actually, especially when it comes to PCs, parity migh be a loss rather
than a win, but not for the reasons you'd suspect. Often, it's the parity
generating circuitry that's the critical path, and it fails more often than
the memories. Thus, you get lots of parity errors that aren't really errors.
Its the parity checking and generating circuitry that's the weak point.


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