Path: utzoo!attcan!uunet!snorkelwacker!apple!baum
From: baum@Apple.COM (Allen J. Baum)
Newsgroups: comp.arch
Subject: Re: Next computer (Re: CISC Silent Spring)
Message-ID: <38553@apple.Apple.COM>
Date: 12 Feb 90 18:42:30 GMT
References: <8859@portia.Stanford.EDU> <20056@netnews.upenn.edu> <486@taniwha.UUCP> <38464@apple.Apple.COM> <26767@cup.portal.com>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 30

[]
I wrote:
>>Um, I hate to break it to you, but the '040 has separate 32 bit address and
>>data busses. They are not mulitplexed. They do not resemble the multiplexed
>>address/data of Nubus.
>
In article <xxx> bcase@cup.portal.com (Brian bcase Case) writes:
>Ah, but there is a mode bit (or is this one of the things that is set
>at reset time like on the R2000/R3000...) that allows the 040 address
>and data bus to be literally tied together to form a muxed bus.  Still,
>I seriously doubt this had anything to do with the system design of the
>NeXT.
>
>Also interesting about the 040, the output impedance of the output
>drivers on the chip is selectable at either 4 or 30 Ohms (I might
>have the numbers slightly wrong).  The idea is that you can have
>speed at the cost of terminating properly or you can have simplicity
>(no termination) at the cost of speed.

I looked it up, and yup, they do it. There are 3 mode lines which are read
during reset for configuration. One changes the timing so address and
data are never driven at the same time; thus, you can short address and
data busses together to form a multiplexed bus. Another is the 4/30 ohm
driver selection, and the third is Data Latch Enable" mode, where read data
can be latched by the DLE signal instead of the clock. They give examples
of where this is advantagous.

--
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