Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!purdue!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!sunybcs!boulder!wallwey From: wallwey@boulder.Colorado.EDU (WALLWEY DEAN WILLIAM) Newsgroups: comp.arch Subject: Re: 64 bit registers Message-ID: <16886@boulder.Colorado.EDU> Date: 12 Feb 90 23:21:27 GMT References: <11121@encore.Encore.COM> Sender: news@boulder.Colorado.EDU Reply-To: wallwey@boulder.Colorado.EDU (WALLWEY DEAN WILLIAM) Organization: University of Colorado, Boulder Lines: 28 If I remmember right, the i860 already has 64 bit registers. Can anybody confirm or deny this. If so, are these the general registers or only floating point ones. Also I think I remmember the designers used 128 bit busses on the chip to keep certain parts of it from starving. Even if the i860 is not in any way a 64 bit proccessor, I really think you will see 64 bit busses in 1-2 years. I also think it would be very limiting to make the address bus size less than your data bus. Granted, you don't need it right now, but that is what they said about 16bit, and 32 bit busses when they first came out. Many of today's memmory systems already have 64 bit wide data paths to help with the memory bottle-neck problems. Of course using just 128 pins for the data and address bus could be a problem, but for a long time breaking the 40 pin barrier was thought to be to expensive for commodity systems. There will obviously be some advantages:Even if the instruction size stays at 32 bits or less, you can grab 2 instructions in the same clock cycle leaving alternate memory cycles for data reads and writes. Another advatage for floating point intensive applications is the ability to read and write double floats in a single memory cycle. Seeing these advatges, you might even see a 64bit 80786 or 68070. (Just a guess.) Write back, or post--I'm always interested in what people think. ---Dean