Path: utzoo!attcan!uunet!snorkelwacker!apple!baum
From: baum@Apple.COM (Allen J. Baum)
Newsgroups: comp.arch
Subject: Re: New instructions for RISCs (was Re: Byte ordering)
Message-ID: <38603@apple.Apple.COM>
Date: 13 Feb 90 20:15:16 GMT
References: <7345@pdn.paradyne.com> <168@zds-ux.UUCP> <7366@pdn.paradyne.com> <1990Feb10.154033.4271@mentor.com>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 35

[]
>In article <1990Feb10.154033.4271@mentor.com> franka@mntgfx.UUCP (Frank A. Adrian) writes:
>Instead of your proposed SPLICE instruction, I'd recommend a
>BITEXT instruction which (using your notation, but where
>[x:y] means bit indexing) looks like:
>.....
>BTW, does anyone have an instruction format which uses the
>source register specifiers as an immediate small constant
>instead of a register specifier?

A quick summer of the HP precision bitfield instructions:

Extract src<start:start+length-1> -> dest
	start, length immediates in inst. use MSB if start+length-1>31
	takes a contiguous bit field and right justifies it
	variations:	sign extend
			take start pos. from special reg.
Deposit src->dest<start:start+length-1> -> dest
	start, length immediates in inst. use MSB if start+length-1>31
	takes a contiguous bit field and right justifies it
	variations:	zero bits outside field
			take start pos. from special reg.
			use 5 bit signed imm. as src
Double shift src1 cat src2 <start:start+31> -> dest
	start is an  immediate in inst.
	aligns a contiguous word that spans two regs.
	variations:	take start from special reg.


Note that desposit with an immediate source can be used as a bit/bitfield
set or clear.

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