Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!samsung!usc!apple!ames!pacbell!rtech!wrs!hwajin
From: hwajin@wrs.wrs.com (Hwa Jin Bae)
Newsgroups: comp.protocols.tcp-ip
Subject: Re: TCP Ethernet Throughput (AMD vs. Intel vs. Seeq)
Message-ID: <855@wrs.wrs.com>
Date: 17 Feb 90 20:00:24 GMT
References: <29931@sparkyfs.istc.sri.com> <12566152530.17.BILLW@MATHOM.CISCO.COM>
Reply-To: hwajin@wrs.wrs.com ()
Organization: Wind River Systems, Emeryville, CA
Lines: 14

In article <12566152530.17.BILLW@MATHOM.CISCO.COM> BILLW@MATHOM.CISCO.COM (William "Chops" Westfield) writes:
> [...]
>So that's how ethernet controllers can "stall" a processor.  As others
>have pointed out - clever hardware designs can get around this by using
>dual ported memory, or other features.

Oh yes... a voice of reason.  I know several designs that suffer from
this very problem.  Additionally, some of the VME CPU boards that have
on board LANCE chips (I won't mention names here...) and do not dedicate
a small pool of separate memory for the LANCE ring buffers should be banned.
A little separate RAM goes a long way... FAST.
-- 
hwajin@wrs.com (uunet!wrs!hwajin)   "Omnibus ex nihil ducendis sufficit unum."
Hwa Jin Bae, Wind River Systems, 1351 Ocean Avenue, Emeryville, CA 94606, USA