Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!think!mintaka!mit-eddie!rutgers!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.amiga
Subject: Re: Commodore and 68040
Keywords: Commodore 68040 EE TIMES
Message-ID: <9697@cbmvax.commodore.com>
Date: 15 Feb 90 18:06:26 GMT
References: <201@modcomp.UUCP> <5623@udccvax1.acs.udel.EDU> <5068@convex.convex.com>
Reply-To: daveh@cbmvax.cbm.commodore.com (Dave Haynie)
Organization: Commodore, West Chester, PA
Lines: 40

In article <5068@convex.convex.com> swarren@convex.com (Steve Warren) writes:

>>                                 ...  Is there any real-world advantage
>>to RISC over CISC, other than being able to run lightning-fast benchmarks
>>to impress customers? ...

>Well, yes, there is, to some extent.  Because the RISC processor eliminates
>instructions that take up disproportionate chip real-estate or require
>multiple cycles to execute there are these advantages:

I think you basically have it here.  It takes a Motorola, or possibly an
Intel, to build something reasonably competative using a more complex
architecture.  Not everyone can bang out a chip with 1.2 million transistors.
At least from Motorola's claims, today's Sparc at 25MHz isn't quite as fast
as the 68040 at 25MHz.  That wouldn't surprise me a bit.  However, the
first Sparc chips were done in reasonably accessible gate arrays, something
anyone can buy from a gate array house.  The original Acorn RISC chip 
reportedly took only 20,000 or so gates to implement; it's not as fast as
an '040 or a Sparc, but not bad.  I think RISC gets you two things:

	- You don't have to be a full custom, state of the art VLSI house
	  to build a reasonable, state of the art (performance-wise) CPU.

	- You might get things moving faster into new technologies, and
	  therefore go faster, sooner.

The last one is probably, more than anything, why Motorola got interested in
RISC.  The 88k was done in CMOS with a silicon compiler, and is much smaller
than the 68040.  You'll certainly see the 88k done in ECL or some other real
fast technology much sooner than anything 68040-ish.  There's already a
reasonably small ECL chipset implementing the MIPS architecture in ECL.  The
only one I've heard of attempting to build an ECL 680x0 family machine,
Edgecore, has lots of gate arrays and essentially built a minicomputer that
just happened to execute 680x0 code, rather than a more cost effective
micro.

-- 
Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests"
   {uunet|pyramid|rutgers}!cbmvax!daveh      PLINK: hazy     BIX: hazy
                    Too much of everything is just enough