Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!wuarchive!mit-eddie!rutgers!bpa!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.amiga
Subject: Re: Commodore and 68040
Keywords: Commodore 68040 EE TIMES
Message-ID: <9727@cbmvax.commodore.com>
Date: 19 Feb 90 18:30:11 GMT
References: <9697@cbmvax.commodore.com> <2211@calvin.cs.mcgill.ca>
Reply-To: daveh@cbmvax.cbm.commodore.com (Dave Haynie)
Organization: Commodore, West Chester, PA
Lines: 41

In article <2211@calvin.cs.mcgill.ca> avrum@calvin.cs.mcgill.ca (Avrum WARSHAWSKY) writes:
>In article <9697@cbmvax.commodore.com> daveh@cbmvax.cbm.commodore.com (Dave Haynie) writes:
>>It takes a Motorola, or possibly an Intel, to build something reasonably competative 
>>using a more complex architecture.  Not everyone can bang out a chip with 1.2 million 
>>transistors.

>In a CISC there are more instructions to worry about, so while a 25MHz 68040 may be 
>faster than a 25MHz SPARC, it will probably be easier to manufacture a 50MHz SPARC than 
>a 50MHz CISC machine using the same IC technology.

Well, that's actually 1/2 my point.  Or may two different quarters.  The bottom line is
that we're not likely dealing with the same IC technology.  Most folks who are still
doing serious work in CISC, such as Motorola and Intel, are also the folks who are 
pushing the barriers of the technology.  As in my point above, it's probably much more
difficult for someone to build a chip like the 68040 that can compete (no real results
are in yet, but it's a pretty safe bet they're close) with a Sparc at the same speed.
However, to date, no one's throwing a process like Motorola's 0.8um CMOS at something
like Sparc.  The original Sparcs were gate arrays!  Something you or I could have made
for us over at LSI Logic, Motorola, or Toshiba, for the right price.  

By implication, that's also the limit on the CISC technology.  A simpler design, like
a Sparc or an 88k, can move into faster silicon (or whatever) sooner.  I'm sure we'll
all have a few more grey hairs by the time we see an ECL or (more likely) GaAs process 
supporting 1.2 million transistors; the durn things just get far too hot.  Which is
why CMOS is doing so well.  Only a few companies make 50MHz and up CPUs in CMOS; they
may get a bit farther in BiCMOS, but chips with that many gates will be hitting hard
limits in speed for some time to come.  There's are already a RISC or two out in ECL 
gate array form, and certainly more on the way.

So the bottom line is probably that neither side may be likely to use the same
technology.  At least until it stabilizes for longer than it has in the past.  Which
I hope never happens, that would get boring real fast.

>Avrum Warshawsky - McGill University, Montreal Canada
>	  avrum@pike.ee.mcgill.ca


-- 
Dave Haynie Commodore-Amiga (Systems Engineering) "The Crew That Never Rests"
   {uunet|pyramid|rutgers}!cbmvax!daveh      PLINK: hazy     BIX: hazy
                    Too much of everything is just enough