Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!brutus.cs.uiuc.edu!apple!sun-barr!newstop!sun!amdcad!nucleus!tim From: tim@nucleus.amd.com (Tim Olson) Newsgroups: comp.arch Subject: Re: 3-input operand instructions -- BITFIELDS, etc Message-ID: <29231@amdcad.AMD.COM> Date: 20 Feb 90 14:59:46 GMT References: Sender: news@amdcad.AMD.COM Reply-To: tim@amd.com (Tim Olson) Organization: Advanced Micro Devices, Inc., Austin, Texas Lines: 23 Summary: Expires: Sender: Followup-To: In article aglew@dwarfs.csg.uiuc.edu (Andy Glew) writes: | A few days ago there was a discussion about instructions useful in | BITblt and friends - instructions for merging bitfields from two | words, etc. It was observed that these instructions frequently | require 3 input operands, as well as a destination - making them | awkward to fit into conventional RISCish 3 operand (2 input, 1 output) | instruction formats, let alone the older 2 operand formats. Implicit | operands and/or destructive use of an operand must be assumed. | | (2) Another four input operand operation: | Concatenate two registers and shift, placing result in a register. | Possibly useful for assembling data that overlap word boundaries, | circular shifts, etc. This is the Am29000's EXTRACT instruction. We use a "residual control" register to hold the shift amount, since that value is changed less often than the data to be shifted. -- Tim Olson Advanced Micro Devices (tim@amd.com)