Path: utzoo!attcan!uunet!tut.cis.ohio-state.edu!cs.utexas.edu!usc!brutus.cs.uiuc.edu!apple!sun-barr!newstop!sun!amdahl!terry From: terry@uts.amdahl.com (Lewis T. Flynn) Newsgroups: comp.arch Subject: Re: Parity (was: Time between memory failure) Message-ID: <08b.02x48aub01@amdahl.uts.amdahl.com> Date: 21 Feb 90 18:36:42 GMT References: <1911@sunquest.UUCP> <38420@apple.Apple.COM> <2102@crdos1.crd.ge.COM> <4139@ganymede.inmos.co.uk> Reply-To: terry@amdahl.uts.amdahl.com (Lewis T. Flynn) Organization: Amdahl Corporation, Sunnyvale CA Lines: 22 In article <4139@ganymede.inmos.co.uk> davidb@inmos.co.uk (David Boreham) writes: >No. Parity is intended to find soft errors. The majority of failures >may well be memory problems but I'd bet that they were nothing to do >with soft errors. > >You can very easily check on the state of your memory chips using a >power-on test. A decent power-on-selftest can also look for marginal >failures. > >Still no parity needed. This works well for some cases but not others. Some applications require 7x24 uptime. These folks are happy to pay for single bit error correction and double bit error detection, and get real upset if they have to power their machines down for any reason. One system with which I was personally associated was booted for any reason only three times in 19 months and the processor was never powered down during that time. Terry Disclaimer: I'm not a hardware type and I don't know what Amdahl's views on this subject might be (although I bet I could guess 8-).